This paper proposes an 11-b 40KS/s Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) structure for sensor applications. Segmented structure is adopted in capacitive DAC to ...
Abstract: This brief presents a low-power CMOS image sensor with 14-bit column-parallel two-step (TS) successive approximation (SA) analog-to-digital converters (ADCs). The proposed TS SA ADC adopts a ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results
Feedback